DS1624S+T&R【PDF 8/18 页】IC THERM/EEPROM DIG 256BYT 8SOIC

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Sheet目录39

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DS1624

f 1

If more than 8 bytes are transmitted by the master, the DS1624 rolls over and overwrites the data

beginning with the first received byte. This does not affect erase/write cycles of the EEPROM array and

is accomplished as a result of only allowing the address registers bottom 3 bits to increment while the

upper 5 bits remain unchanged. The DS1624 is capable of 20,000 writes (25,000 erase/write cycles)

before EEPROM wear out may occur.

If the master generates a STOP condition after transmitting the first data word, byte programming mode

is entered.

Read Mode

In this mode, the master is reading data from the DS1624 E

memory. The master first provides the slave

address to the device with R/

set to 0. The master then sends the Access Memory protocol and, after

receiving an acknowledge, then provides the word address, which is the address of the memory location

at which it wishes to begin reading. Note that while this is a read operation the address pointer must first

be written. During this period the DS1624 generates acknowledge bits as defined in the appropriate

section.

The master now generates another START condition and transmits the slave address. This time the R/

bit is set to 1 to put the DS1624 in read mode. After the DS1624 generates the acknowledge bit it

outputs the data from the addressed location on the SDA pin, increments the address pointer, and, if it

receives an acknowledge from the master, transmits the next consecutive byte. This auto-increment

sequence is only aborted when the master sends a STOP condition instead of an acknowledge. When the

address pointer reaches the end of the 256-byte memory space (address FFh) it will increment from the

end of the memory back to the first location of the memory (address 00h).

Command Set

Data and control information is read from and written to the DS1624 in the format shown in Figure 3. To

write to the DS1624, the master will issue the slave address of the DS1624 and the R/

bit will be set to

0. After receiving an acknowledge the bus master provides a command protocol. After receiving this

protocol the DS1624 will issue an acknowledge then the master may send data to the DS1624. If the

DS1624 is to be read, the master must send the command protocol as before then issue a repeated START

condition and the control byte again, this time with the R/

bit set to 1 to allow reading of the data

from the DS1624. The command set for the DS1624 as shown in Table 3 is as follows.

Access Memory [17h]

This command instructs the DS1624 to access its E

memory. After issuing this command, the next data

byte is the value of the word address to be accessed. See the OperationMemory section for detailed

explanations of the use of this protocol and data format following it.

Access Config [ACh]

If R/

is 0, this command writes to the configuration register. After issuing this command, the next

data byte is the value to be written into the configuration register. If R/

is 1, the next data byte read is

the value stored in the configuration register.

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